Electronic design automation (EDA) tools are used to design integrated circuits. Integrated circuits can include many thousands and perhaps millions of circuit elements (e.g, transistors, logic gates, diodes, etc.) and interconnecting wires and busses. The circuit elements and wires can be formed on many different layers, with various interconnections (e.g, vias) between layers. EDA tools allow a designer to describe an integrated circuit based on its desired behavior, and then transform that behavioral description into a set of geometric shapes called a layout which forms the circuit elements and wires for all the different layers.
EDA tools further allow certain components to be specified at a high level of abstraction and then replicated many times in the overall integrated circuit, each being called an “instance,” at lower levels of abstraction and placed on different layers of the integrated circuit. Any given instance can include dozens or more geometric shapes, and some shapes in the same instance can be placed in different layers, for example to allow for shapes to be aligned with different tracks or other specified directions associated with different layers. Instances can also include “pins,” which are elements that allow the instance to be connected with other components via wires and busses for example.
As integrated circuit feature sizes continually get smaller and smaller (e.g, 10 nm and below), EDA tools need to be aware of an ever-increasing number of constraints to ensure that instances are placed correctly for a target fabrication process. Current approaches are unsatisfactory, for example only checking a single track or shape in an instance against the constraints, without consideration for other shapes in the instance.